class="jd__row--main jd__summary--main" data-reactid="101">At (COMPANY NAME), we work every single day to craft products that enrich people's lives. The people here at (COMPANY NAME) don't just build products - they create the kind of wonder that revolutionizes entire industries. We invite you to join our dynamic group, for the unique and rewarding opportunity to contribute to upcoming products that will delight and inspire millions of (COMPANY NAME)'s customers every day! (COMPANY NAME)'s PMU Hardware Tech team are responsible for delivering the power in a highly configurable and controlled way to the high end (COMPANY NAME) SoCs, which power everything from (COMPANY NAME) Watch and (COMPANY NAME) TV to iPhone, iPad and Mac. We're looking for dedicated students who help us to innovate the way we verify power management devices, to provide industry leading power and battery efficiency and achieve customer expectations of device performance. Do you love working on challenges that no one has solved yet? Then we welcome you to work among the industry's best! As part of the Design Verification Team, you will assist with delivering high quality chips in order to meet performance, feature, timing, area, power and efficiency goals. We will provide you with the mentorship and the opportunity to collaborate with experienced Design Verification Engineers, as well as work alongside our Design, SoC Platform Architecture, and Physical Design teams. You will get the opportunity to be part of a team delivering PMU silicon directly into next generation (COMPANY NAME) products and work with the state of the art verification techniques.
* Strong familiarity with understanding RTL design in Verilog/VHDL and logic structures being inferred Very good understanding of OOP basics and experience/exposure of using HDLs/HVLs such as SystemVerilog and/or UVM
* Excellent interpersonal skills and well-organised working style
* Strong analytical/problem solving skills
* Ability to work well in a team and be productive under tight schedules
* Knowledge of finite state machine, CPU bus architectures and mixed signal design/verification is desirable
* TCL/Perl/Python scripting experience/exposure is a plus
Your tasks will include: - Develop your expertise in ASIC verification by working with a best-in-class Design Verification team to create verification plans, develop stimulus, define verification strategy and completeness metrics - Implement various components of the verification environment and participate in debugging test-bench code as well as deep design debug -Where applicable, run simulations with synthesized netlist and analyse/debug any issues encountered - Collaborate with the architecture and design teams to ensure any potential issues/critical cases are considered and dealt with as early as possible in the design cycle
Education & Experience
Education & Experience
Currently enrolled in your penultimate year of studies in a CE, EE, CS or related field (Bachelor's, Master's or PhD).
* (COMPANY NAME) is an Equal Opportunity Employer committed to inclusion and diversity. We take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, and individuals with disabilities
|Posted on:||14 Oct 2021|
|Type of job:||Internship|