Internship - Digital Design Verification

Description du poste:

In your new role you will:

* Read and understand functional, architectural and implementation specifications;
* Define and develop test scenarios required to verify that IP/ASIC meets functional and performance goals;
* Define and implement coverage plans;
* Maintain or develop verification environments to support IP/ASIC development;
* Find root cause of design flaws - hunting and reporting bugs in designs

Profil requis du candidat:

You are best equipped for this task if you have:

* On track to attain Bachelor's Degree in Electronics/ Engineering or other similar field of study;
* Knowledge of electronic devices and circuits, digital integrated circuits, computer architecture;
* Knowledge of hardware description language (Verilog/VDHL), hardware(functional) simulation;
* Basic knowledge about C and C++;
* Able to read English documents

Other preferred traits:

* Knowledge or experience on hardware verification language(SystemVerilog) and methodology (UVM) is preferred;
* Hands-on experience with hardware simulation tools and scripting;
* Experience with working on Unix/Linux environment;
* Hands-on experience with FPGA;
* Experience working in university labs on IC design topics;