Stages di Design in Vietnam
Azienda non indicata | Vietnam | Stage, Design, Inglese
“(COMPANY NAME) Vietnam offers a 6-month onsite Design Verification Internship in Ho Chi Minh City. Responsibilities include testbench development, simulation, debugging, and automation scripting. Requires 4 days/week onsite commitment, SystemVerilog/UVM knowledge, and a Bachelor's in EE/CE/CS. Includes internship allowance, training, and benefits.”
Azienda non indicata | Vietnam | Stage, Design, Inglese
“Internship opportunity at (COMPANY NAME) Vietnam for a STA Design Intern role. Requires 6 months onsite in Ho Chi Minh City, 4 days/week. Tasks include Static Timing Analysis, constraint management, and scripting in Tcl/Python/Perl. Open to third/final-year Electrical/Computer Engineering students with Verilog/SystemVerilog knowledge. Competitive internship allowance and benefits included.”
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