Graduate Jobs at Intel

“Temporary HR Systems Analyst role at Intel in Costa Rica for 1 year. Support HR software solutions deployment, system integration, and maintenance. Requires Bachelor's degree in Computer Science or related field, 1+ year of Workday configuration experience, and advanced English. Hybrid work model.”

“Experienced hire position for a TD Media and Collaterals Development Engineer at Intel in Phoenix, Arizona. Develop media and collaterals for assembly processes, optimize manufacturing efficiency, and innovate solutions. Requires BS/MS/PhD in Engineering or related field with 6+ months experience. Strong mechanical design software skills preferred. On-site role with competitive compensation ranging from $115,110 to $162,500 USD.”

“Experienced Module Equipment Technician role at Intel Foundry in Kulim, Malaysia. Responsibilities include troubleshooting, repairing, and maintaining manufacturing equipment, performing preventative maintenance, and supporting engineering tasks. Requires relevant experience and offers on-site work.”

“Linux Validation Engineer role in Gdansk, Poland. Responsibilities include Linux Kernel validation, automation, and debugging. Requirements: Linux Kernel knowledge, DevOps, Bash scripting, GIT, and English proficiency. Offers flexible hours, training, and comprehensive benefits.”

“AI Performance and Projection Engineer role in Bangalore, India. Model AI hardware and software for performance analysis, enhance modeling toolkit, propose optimizations. Requires 9+ years of experience with BS, 6+ with Masters, or 3+ with PhD. Strong Python/C++ skills, knowledge of computer architecture, and AI algorithms. Hybrid work model.”

“Packaging Module Development Engineer role at Intel. Develop assembly processes, optimize manufacturing, and innovate packaging technologies. Requires Master's or PhD with experience in optics, semiconductor inspection, and data science. On-site role in Phoenix, Arizona with competitive compensation and benefits.”

“Join Intel as a Packaging Module Development Engineer to work on advanced machine vision and machine learning applications for semiconductor packaging. Responsibilities include package design, thermal/mechanical/electrical analysis, and project management. Minimum qualifications include a Bachelor's or Master's degree in Engineering, Physics, or Computer Science with relevant experience in optics and imaging techniques. Preferred qualifications include semiconductor inspection, data science tools like Python, and machine vision techniques. The role is based in Phoenix, Arizona, with an annual salary range of $85,200 to $139,810 USD.”

“Packaging Module Development Engineer at Intel's APTM division. Develop FLI/SLI and thermal solutions, collaborate with cross-functional teams, innovate materials and processes. PhD required in related fields. Onsite role in Phoenix, AZ. Salary range: $133,800-$188,890 USD.”

“Intel seeks a Tax Specialist for their Global Employment Tax team in Leixlip, Ireland. The role focuses on EMEA employment tax matters, compliance, risk management, and cost-saving opportunities. Requires 6+ years of experience in mobility and employment tax, with strong communication skills and understanding of EMEA tax laws.”

“Intel seeks a Product Group HW Governance Business Systems Analyst to provide 1st level support for Service Now and inventory tracking processes. The role involves troubleshooting, data updates, user training, and system upgrades. Ideal candidates have ServiceNow experience, strong MS Office skills, and IT or customer support background. The position offers a competitive compensation package and a hybrid work model.”

“Deep Learning Hardware Design Engineer position in Leixlip, Ireland. Responsibilities include RTL development, micro-architectural specification, and collaboration with various teams. Required skills: System Verilog, Verilog, project delivery, teamwork. Preferred: ASIC, SoC, FPGA design, C/C++, SystemC, OVM/UVM, SVAs, Perl, Shell scripting, Synthesis, Formal Verification, DFT, VCS, PrimeTime, Design Compiler, Jasper (FPV), model quantization, CNNs, LLMs. On-site role.”

“Intel Foundry Finance Revenue Analyst role in Phoenix, Folsom, or Hillsboro. Responsible for managing revenue forecasting, accounting, and reporting. Requires a Bachelor's degree in Finance or related field and 6 months of finance experience. Offers competitive pay, benefits, and on-site work model.”

“AI Algorithm Engineer role at Intel in Gdansk, Poland. Optimize AI workloads for GPU hardware, collaborate with hardware architects, and develop AI software stack. Requires C++/Python skills, AI frameworks experience, and GPU performance analysis. Competitive pay, benefits, and professional development opportunities.”

“GPU/DFT Logic Design Engineer role in Bangalore, India. Develop DFT design, RTL coding, and simulation for GPU. Define architecture and microarchitecture features. Optimize logic for power, performance, area, and timing goals. Review verification plans, resolve failing tests, and document micro architectural specs. Support SoC customers for high-quality GPU block integration. Requires 7-10 years of experience. On-site role.”

“Physical Design Engineer role in Ireland. Responsibilities include RTL to GDSII implementation, physical design flow, verification, and optimization. Required skills: low power design, EDA tools, timing closure. Bachelor's or Master's degree in Engineering. On-site role in Leixlip, part of Intel's Silicon Engineering Group.”

“Intel is seeking a Server Platform Validation and Debug Engineer for their Data Center Group in Guadalajara, Mexico. The role involves validating server platforms, debugging issues, and collaborating with cross-functional teams. Candidates should have a Bachelor's degree in Engineering, 1+ years of experience in system design and validation, and advanced English skills. The position is for a College Grad and offers a hybrid work model.”

“* Activities include problem analysis and methodology definition, followed by design, implementation, test, de...”

“* Innovate modeling frameworks, automation, and simulation flows to accelerate design cycles. ...”

“Performance and Efficiency Optimization * Develop strategies for bandwidth optimization, latency reduction, an...”

“* Understanding silicon parametric across distributions (Vmins, Cdyn, leakage, transistor performance, Basic o...”

“This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspective...”

“* Working closely with design engineers, micro-architects, and other team members to ensure high quality of te...”