Doctoral Thesis: Physical Features and Constraints in digital IP-Generation (f/m/div)

Description du poste:

The industrial doctorate at (COMPANY NAME): Pursue a doctoral degree at a university and gain professional experience simultaneously - an ideal start for your career. Advance your research with us and profit from our vast network of doctoral candidates and the expertise of a university. Mentorship is handled by both professors and dedicated (COMPANY NAME) employees. We are offering a doctoral thesis dealing with Digital IPs, which are implemented in hardware description languages following the so-called RTL abstraction. Conceptually RTL models are technology, i.e. physical features and constraints, independent, since they are mapped via synthesis and R2G tools to their hardware implementation. However, the chosen hardware RTL implementation has still a big impact on the so-called quality of result, i.e. the technology dependent features as timing or power consumption. Further, making the RTL code is still a substantial effort in designing digital chips. Code generators are named as a promising and novel approach to raise productivity in RTL design. (COMPANY NAME) combines these generators with the technology of metadata and metamodels, which act as a formal specification for the generators. This thesis strives to overcome the barrier of technology independent RTL code on the one hand side and technology dependent features on the other side by making RTL generators aware of physical features. In addition, generation should also constrain the implementation by additionally generated constraints. The goal is to improve todays design and generation approach in the following fields: * More efficient IPs through physical aware RTL * More automation in IP generation * Making of test chips and/or test FPGAs to validate the approach This doctoral thesis should also study existing approaches, prove the applicability and get feedback to enhance the methodology. We offer: * Realistic, challenging, and impactful problems * The possibility of putting problems into an overall context * Collaboration with colleagues and teams that is seldom found anywhere in the world in terms of depth and breadth * A potential 3 months research stay at top universities worldwide and/or Europe wide cooperation of experts as part of funded research activities * An (COMPANY NAME) internal PhD community The thesis will be written in cooperation with Technical University Munich and under the supervision of Prof. Dr. Wolfgang Ecker.
The tasks within the thesis will consist of:

* Extend IP-metadata with timing and power information and constraints
* Extend IP-metadata with layout/floorplanner hinting
* Generate hereof timing constraint files and UPF
* Generate floorplanner data and establish feedback loop The learnings out of the thesis will be:

* Generic physical feature aware hardware design and implementation
* Methodology of 'code generation' in an industrial environment
* Modeling and Meta-Modeling
* Various Modeling and Abstraction concepts and their implementation
* Digital hardware design concepts and disciplines

Profil requis du candidat:

A doctoral student is a research enthusiast,
› …whose interests are scientific research combined with the passion for (COMPANY NAME)'s innovative products and applications.
› …who enjoys working in an industrial environment in combination with an (COMPANY NAME) partner university.
› …who appreciates open communication and the contribution of an international environment.
› …and is thus an excellent candidate for a further academic or industrial career after completion of their thesis.

As the ideal candidate you:

* Graduated in computer engineering, electrical engineering or a related field with very good grades
* Are interested in complex, interdisciplinary and interlinked tasks and should like to solve them together with colleagues
* Possess good presentation skills that help you to present challenging issues clearly and simply
* Are curious and open as well as interested in learning and trying out new things
* Have first experience with metamodeling, (template-based) code generation and/or model-driven architecture
* Possess knowledge in object-oriented programming with languages such as C ++ or Python
* Have good knowledge of digital design and RTL modeling in VHDL and / or (System)Verilog and embedded system architectures
* Have good knowledge in synthesis and layout tools
* Are interested in generation and recursive application of generation, e.g. generation of generators
* Possess very good language skills in English and ideally German