Ofertas de empleo y prácticas de Ingeniería en Cambridge, Reino Unido
No se muestra la compañía | Cambridge | Prácticas, Ingeniería, Inglés
“12-month internship at ZEISS in Quality Engineering, based in Cambourne. Role involves process improvement, data analysis, and collaboration across teams to enhance operational efficiency. Open to bachelor's degree students, placement year students, or recent graduates with analytical and problem-solving skills.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Position for an AI Geometry Development Engineer at (COMPANY NAME) to develop geometric algorithms and AI-enhanced solvers for MODSIM solutions. Requires Ph.D or Master's in Applied Math/CS, AI/ML experience, and expertise in computational geometry. Focus on model preparation for numerical simulation workflows.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Full-time DevOps Automation Engineer role in (COMPANY NAME) Wolf Security's Cambridge office, requiring expertise in PowerShell, Azure, Python, and CI/CD pipelines. Hybrid work model (3 days onsite). Focus on automation, security, and scalable cloud infrastructure for cybersecurity solutions.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Maintenance Engineer role at (COMPANY NAME) for general repair, plumbing, electrics, and decorating in hotel premises. Involves emergency tasks, H&S checks, and proactive maintenance. Offers career growth, staff benefits, free stays, gym access, and global opportunities across (COMPANY NAME) hotels.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“(COMPANY NAME)'s Silicon Engineering Group seeks a Software Engineer to develop and optimize CLIs, UIs, and APIs for chip design specifications. Role involves performance tuning, documentation, and collaboration with silicon designers. Requires expertise in Scala, JVM, XML, and CI/CD pipelines.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Position for a Machine Learning Research Engineer in (COMPANY NAME)'s Camera & Photos team. Focus on computational photography, ML, and image processing algorithms for iPhone/iPad cameras. Requires PhD in Computer Science or related field, strong coding skills (Python, MATLAB, C++), and experience in productizing research. Work on algorithms used by millions globally.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“(COMPANY NAME) seeks a GPU Physical Design Engineer to design high-performance, power-efficient GPUs for next-gen devices. Requires BSc/MSEE or equivalent, ASIC implementation experience (Synthesis, Floorplanning, P&R), and expertise in timing/physical signoff. Hands-on role from RTL to tape-out.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Experienced GPU Physical Design Engineer role at (COMPANY NAME)'s Silicon Technologies group. Requires MSEE, expertise in ASIC integration, floorplanning, clock/power distribution, and large chip design (>20M gates, >1GHz). Hands-on experience with P&R flows, timing verification, and physical design verification for high-performance GPUs.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“(COMPANY NAME) seeks a Performance Modelling Engineer to drive GPU micro-architecture innovation, collaborating with cross-functional teams to optimize next-gen GPU architectures. Role involves C++ performance modeling, data analysis, simulator development, and architectural specification for high-performance products.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“(COMPANY NAME) seeks a Quality Automation Engineer to ensure the reliability of its chip design documentation platform. Role involves designing test plans, automating functional/performance/security testing, and collaborating with teams to resolve defects. Requires expertise in Scala/Java, test frameworks (ScalaTest/Playwright), CI/CD tools (Jenkins/TeamCity), and containerization (Kubernetes).”
No se muestra la compañía | Cambridge | Prácticas, Ingeniería, Inglés
“(COMPANY NAME) Wolf Security seeks a Performance Engineer Intern for 12 months to enhance endpoint security products. Responsibilities include improving performance test infrastructure and fixing bugs in reporting systems. Ideal candidates are students in scientific or engineering disciplines with Python knowledge and an interest in endpoint security solutions. Remote applications are not considered.”
No se muestra la compañía | Cambridge | Prácticas, Ingeniería, Inglés
“(COMPANY NAME) seeks interns for CAD Hardware Tech team to innovate chip design methodologies. Role involves optimizing simulation tools, reducing resource requirements, and collaborating with vendor and internal teams. Expertise in Cadence tool chain, SystemVerilog/Verilog/VHDL, and curiosity about GPU/PMU/CPU/SOC architecture is required.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“GPU Physical Verification Design Engineer role at (COMPANY NAME). Design and verify next-gen GPU chips. Work on physical design verification, collaborate with cross-functional teams, and drive methodologies. Experience in physical verification checks, P&R flows, and large subsystem designs required. BS/MS degree and relevant experience needed.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“GPU Electrical Analysis Engineer role at (COMPANY NAME). Design and manufacture next-gen GPUs. Work on power grid specs, power integrity, EM, ESD analysis. Collaborate with cross-functional teams. Requires BS/MS in EE, experience in power delivery networks, and large SoC designs.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Experienced GPU Electrical Analysis Engineer role at (COMPANY NAME). Design and manufacture next-gen GPUs, focusing on electrical analysis, power integrity, and large chip integration. Collaborate with cross-functional teams, develop test structures, and drive design solutions. Requires BS/MS in EE and relevant experience.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“Early Career GPU Top Level Physical Design Engineer role at (COMPANY NAME). Design and manufacture next-gen GPUs. Implement chip design from netlist to tapeout. Collaborate with FE team, drive physical design, and innovate methodologies. Requires MSc in EE and relevant experience. Knowledge in ASIC integration, Floorplanning, P&R flows, and GPU architecture.”
No se muestra la compañía | Cambridge | Ingeniería, Inglés
“GPU Top Level Physical Design Engineer role at (COMPANY NAME). Design and manufacture next-gen GPUs. Implement chip design from netlist to tapeout. Collaborate with FE team, drive physical design methodologies, and supervise progress. Requires BSc in EE, experience in ASIC integration, floorplanning, P&R flows, and large subsystem designs. Knowledge of GPU architecture and design units preferred.”
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