Ingenieurswesen Praktika in Neapel, Italien
Firmennamen nicht gezeigt | Neapel | Praktikum, Ingenieurswesen, Englisch
“Internship presso Avio Aero ((COMPANY NAME)) per ruolo Quality Engineer in ambito aeronautico. Attività include supporto a validazione prodotti, analisi FMEA, gestione non conformità, RCCA e miglioramento processi. Requisiti: laurea magistrale in ingegneria meccanica/aerospaziale, conoscenza disegni tecnici, inglese e italiano fluenti, attitudine analitica e problem solving.”
Firmennamen nicht gezeigt | Neapel | Praktikum, Ingenieurswesen, Englisch
“Internship opportunity at (COMPANY NAME) for Firmware Engineering in Data Center SSD development. Supports firmware activities, embedded systems, and low-level programming (C/C++/Rust) under experienced engineers. Ideal for students in computer/electrical engineering with basic programming and embedded systems knowledge.”
Firmennamen nicht gezeigt | Neapel | Praktikum, Ingenieurswesen, Englisch
“Internship opportunity at (COMPANY NAME) for a System Validation Engineer role in Arzano, Italy. Focus on MNAND firmware/SSD debug, embedded systems (Android/Linux/QNX), and tool development. Ideal for Master's students in computer/electronic engineering with skills in C, Python, and validation workflows. Involves problem-solving, kernel debugging, and collaboration with FW/validation teams.”
Firmennamen nicht gezeigt | Neapel | Praktikum, Ingenieurswesen, Englisch
“Oferta de prácticas en (COMPANY NAME) para Ingeniero de Verificación MNAND, enfocado en aplicaciones automotrices. Requiere conocimientos básicos en IA/ML, Python y métodos de verificación digital. Proyecto incluye análisis de arquitectura, definición de casos de prueba y generación de código lógico para algoritmos internos en equipo multidisciplinar en Arzano (Italia).”
Firmennamen nicht gezeigt | Neapel | Praktikum, Ingenieurswesen, Englisch
“Internship opportunity at (COMPANY NAME) for a Systems Design Engineer role focused on FPGA-based systems. Tasks include developing a high-speed JESD204C protocol prototype between two FPGAs, integrating AMD Vivado IP, RTL design, simulation, and lab validation. Requires VHDL/Verilog knowledge, FPGA experience, and familiarity with lab instruments. Bachelor's or Master's in electronic/computer engineering required.”
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